Electronic devices using semiconductors are utilized in a wide variety of applications. They provide the computing capability and data storage that make possible not only the operation of computers, large and small, but also things like electronic gaming devices, home entertainment systems, and telephones and other communications equipment. Advances in technology have made possible not only the construction of these and other components, but have made them more capable, more portable, and more affordable as well.
A semiconductor is actually a material that is a conductor of electricity under some conditions, but not others. Silicon, for example, may be treated with a dopant such as ionized boron or phosphorus so that its conducting capabilities may be turned on or off by the presence (or absence) of an electrical field. Small electronic components that exploit this property may be constructed. One such component is a transistor. A transistor is a small switch that can be used to control the flow of a (typically small) amount of electricity. Computers, for example, employ thousands of these tiny switches to send the electrical signals that allow them to quickly perform complex calculations.
An exemplary transistor is shown in FIG. 1. FIG. 1 is an illustration showing in cross-section the basic components of a MOSFET 10 (metal-oxide semiconductor field effect transistor). The doped silicon forms the substrate 15 upon which various devices may be fabricated. The transistor includes a gate 20 having a gate electrode 25 made of a conductive material such as a metal, and is separated from the substrate 15 by a thin gate oxide layer 30. In the transistor 10 of FIG. 1, spacers 35 are positioned on either side of the gate electrode 25. Conductive regions called a source 40 and a drain 45 are formed in the substrate 15 on either side of the spacers 35. Source 40, drain 45, and gate electrode 25 are each coupled, respectively, to electrical contacts 50, 51, 52, each of which may in turn be connected to external components (not shown) so that electrical current may flow to and from these transistor components when appropriate. When a small electrical charge is applied to gate electrode 25 via contact 52, then current will flow between drain 45 and source 40 via channel region 5. These MOSFET transistors are very small, for example, the gate electrode 25 of MOSFET 10 may be no more than 100 nm in width.
As mentioned above, thousands, or even millions of these transistors may be employed in the manufacture of even a small personal computer. Because of their small size, however, a great many transistors may be formed on a single substrate, as illustrated in FIG. 2. FIG. 2 is an illustration showing in cross-section a semiconductor device 55, which is a substrate 15 populated with a number of individual MOSFET transistors 10. Note that for convenience, all of these devices are shown to be identical, but the formation of other types of devices as well is both possible and typical (although there are usually a great many substantially-identical semiconductor devices present). The component transistors 10 in FIG. 2 being substantially identical, selected reference numbers have been applied to only one of them. As with FIG. 1, the external connections to these devices are not illustrated; some of the transistors with be connected to each other, and some to external devices (also not shown). Note also that the term ‘semiconductor device’ is being used broadly to include either a complete, fabricated unit or simply a portion of one. As should be apparent, FIG. 2 illustrates only a small portion of a complete unit.
This entire unit (not shown), once completed, is enclosed in the familiar (usually black) plastic packaging to form a chip. A number electrical leads (or pins) typically extend from the chip to facilitate connections between internal and external circuits. There are a number of process steps, however, that the semiconductor goes through prior to packaging. The processes used for fabricating semiconductor devices are both numerous and varied, but the overall methodology can be generally described.
The process typically begins with the provision of the substrate, such as substrate 15 shown in FIGS. 1 and 2. The substrate 15 is often a thin slice of silicon called a wafer. The silicon wafer then undergoes doping, followed by a series of steps in which a variety of materials are deposited or selectively etched away. In this manner, the MOSFET transistors 10 shown in FIG. 2 may be fabricated onto the surface of wafer substrate 15. Although not shown in FIG. 2, these transistors (and other devices as well) will be connected together to form circuits that perform the various functions required of the chip.
Notwithstanding the advances that have already been made, there is a constant drive in the semiconductor industry to create ever-denser collections of electronic devices on a single chip. This allows for greater functionality for the chip or permits it to be made smaller, or both. The speed of the chips operation may also be enhanced by the reducing the size of the devices formed on the wafer and placing them closer together. Components are now so small, however, that advances in speed are not necessarily resulting simply from reductions in size.
One response is to use strained silicon in the construction of semiconductor devices. Strained silicon takes advantage of a characteristic of the substrate material, namely that in certain applications silicon allows electrical-charge carriers to pass more quickly when its crystal lattice is stretched (or compressed) a small amount. In one way to accomplish this stretching, an alloy of silicon and germanium is deposited onto an existing silicon layer. On top of this silicon-germanium layer is then deposited a thin layer of silicon. The germanium in the silicon-germanium alloy causes the atoms in the overlying silicon layer to be somewhat stretched apart from their normal orientation—producing the strain of the strained silicon. One problem with using the selective epitaxial growth (SEG) strained-silicon approach is local loading. Local loading occurs where, for example, the wafer is more densely populated in one region than in another. For example, in FIG. 2, region X is a region of lower pattern density. This may, for example, be associated with an I/O function, which requires a smaller number of components than region Y, which is a higher pattern density area and may be, for example, a memory-circuit portion of the device. This tends to cause a lack of planarity when SEG is performed, a significantly undesirable condition. This can lead to local-loading-effects, such as undesirable voids forming in the source and drain regions of the more isolated transistors. FIG. 3 is an illustration of the semiconductor device 55 shown in FIG. 2 (where it is more ideally illustrated), illustrating the presence of voids 60 formed in the silicon-germanium (SiGe) source and drain regions. Void 60 may be an area of thinner SiGe or result from an incomplete SiGe deposition. These types of voids could degrade device performance, and could also serve as the defect source in subsequent process steps. Needed then is a manner of taking advantage of the benefits that the strained-silicon process SEG can produce, while at the same time avoiding its undesirable consequences, such as the source and drain voids mentioned above. The present invention provides just such a solution.